Ukusetyenziswa koMbane oLungisayo weLCD waMandla asekwe kwi-DWIN T5L ASIC

——Kwabelwane ngayo kwi-DWIN Froum

Ukusebenzisa i-chip ye-DWIN T5L1 njengeyona nto ingundoqo yokulawula umatshini wonke, ifumana kunye neenkqubo zokuthinta, ukufumana i-ADC, ulwazi lolawulo lwe-PWM, kwaye iqhube isikrini se-LCD ye-3.5-intshi ukubonisa isimo sangoku ngexesha langempela.Ukuxhasa uhlengahlengiso olukude lokukhanya komthombo wokukhanya kwe-LED ngokusebenzisa imodyuli yeWiFi, kunye ne-alarm yenkxaso yelizwi.

Iimpawu zenkqubo:

1. Yamkela i-chip ye-T5L ukuba iqhube kwi-frequency ephezulu, isampuli ye-analog ye-AD izinzile, kwaye impazamo incinci;

2. Inkxaso TYPE C eqhagamshelwe ngokuthe ngqo kwi-PC ukwenzela ukulungisa iimpazamo kunye nokutshiswa kweprogram;

3. Ukuxhasa ujongano olungundoqo oluphezulu lwe-OS, i-16bit parallel port;UI core PWM port, AD port lead out, i-design yesicelo esiphantsi, akukho mfuneko yokongeza i-MCU;

4. Inkxaso ye-WiFi, i-Bluetooth remote control;

5. Inkxaso ye-5 ~ 12V DC yombane obanzi kunye nokufakwa koluhlu olubanzi

1.1 Umzobo wesicwangciso

1.2 ibhodi yePCB

1.3 Ujongano lomsebenzisi

Intshayelelo yehlazo:

(1) uyilo lwesekethe yezixhobo

1.4 T5L48320C035 umzobo wesekethe

1. Unikezelo lwamandla engqiqo ye-MCU 3.3V: C18, C26, C27, C28, C29, C31, C32, C33;

2. Umbane ongundoqo we-MCU 1.25V: C23, C24;

3. Unikezelo lwamandla e-analog ye-MCU 3.3V: I-C35 ngumbane we-analog ye-MCU.Xa i-typesetting, i-core 1.25V yomhlaba kunye nomhlaba we-logic unokudibaniswa kunye, kodwa umhlaba we-analog kufuneka uhlukaniswe.Umhlaba we-analog kunye nomhlaba wedijithali kufuneka uqokelelwe kwisibonda esibi se-LDO semveliso ye-capacitor enkulu, kunye ne-analog positive pole kufuneka kwakhona iqokelelwe kwi-polepositive ye-LDO capacitor enkulu, ukwenzela ukuba i-sampling ye-AD Ingxolo iyancipha.

4. Isiphaluka se-AD ye-analog yokufumana isiphaluka: I-CP1 yi-AD ye-analog input filter capacitor.Ukuze kuncitshiswe impazamo yesampulu, umhlaba we-analog kunye nomhlaba wedijithali we-MCU uhlukaniswe ngokuzimeleyo.I-pole negative ye-CP1 kufuneka ixhunywe kumhlaba we-analog ye-MCU kunye ne-impedance encinci, kunye ne-capacitors ezimbini ezihambelanayo ze-crystal oscillator zixhunywe kumhlaba we-analog ye-MCU.

5. Isekethe ye-Buzzer: I-C25 yi-capacitor yonikezelo lwamandla kwi-buzzer.I-buzzer sisixhobo se-inductive, kwaye kuya kubakho i-peak current ngexesha lokusebenza.Ukuze unciphise i-peak, kuyimfuneko ukunciphisa i-MOS drive yangoku ye-buzzer ukwenza ityhubhu ye-MOS isebenze kwindawo yomgca, kwaye uyilo isiphaluka ukuze isebenze kwimodi yokutshintsha.Qaphela ukuba i-R18 kufuneka idityaniswe ngokunxuseneyo kuzo zombini iziphelo ze-buzzer ukulungisa umgangatho wesandi we-buzzer kwaye wenze i-buzzer isandi esimnandi kwaye simnandi.

6. Isekethe ye-WiFi: isampuli ye-chip ye-WiFi ESP32-C, ene-WiFi+Bluetooth+BLE.Kwiingcingo, umhlaba wombane weRF kunye nomhlaba wesignali zahluliwe.

1.5 uyilo lwesekethe yeWiFi

Kulo mfanekiso ungentla, inxalenye ephezulu yobhedu yobhedu yi-loop yomhlaba wamandla.I-antenna ye-WiFi ebonisa iluphu yomhlaba kufuneka ibe nommandla omkhulu kumhlaba wamandla, kwaye indawo yokuqokelela indawo yamandla yipali engalunganga ye-C6.Umbane okhoyo obonakalisiweyo kufuneka unikwe phakathi komhlaba wamandla kunye ne-eriyali ye-WiFi, ngoko ke kufuneka kubekho i-copper coating phantsi kwe-eriyali ye-WiFi.Ubude bengubo yobhedu budlula ubude bokwandiswa kwe-antenna ye-WiFi, kwaye ukwandiswa kuya kwandisa uvakalelo lwe-WiFi;khomba kwipali engafanelekanga yeC2.Indawo enkulu yobhedu inokukhusela ingxolo ebangelwa yimitha ye-antenna ye-WiFi.Imihlaba e-2 yobhedu yahlulwe kuluhlu olusezantsi kwaye iqokelelwe kwi-pad ephakathi ye-ESP32-C nge-vias.Umhlaba wamandla weRF udinga i-impedance esezantsi kunelophu yomqondiso, ngoko ke kukho ii-vias ezi-6 ukusuka kumhlaba wamandla ukuya kwi-chip pad ukuqinisekisa ukuthintela okuphantsi ngokwaneleyo.Iluphu esemhlabeni yecrystal oscillator ayinakuba namandla eRF aqukuqelayo kuyo, kungenjalo icrystal oscillator iya kuvelisa ijitha yamaxesha, kwaye iWiFi frequency offset ayizukwazi ukuthumela nokufumana idatha.

7. I-backlight ye-LED yesiphaluka sombane: I-SOT23-6LED isampula ye-chip yomqhubi.Umbane we-DC / DC kwi-LED ngokuzimeleyo yenza i-loop, kunye ne-DC / DC umhlaba uqhagamshelwe kumhlaba we-3.3V LOD.Ekubeni i-port core ye-PWM2 ikhethekileyo, ikhupha isignali ye-600K ye-PWM, kwaye i-RC yongezwa ukusebenzisa imveliso ye-PWM njengolawulo lwe-ON / OFF.

8. Uluhlu lwegalelo lombane: ezimbini ze-DC / DC ze-step-downs ziyilwe.Qaphela ukuba i-R13 kunye ne-R17 resistors kwisekethe ye-DC/DC ayinakushiyeka.Iitshiphusi ezimbini zeDC/DC zixhasa ukuya kuthi ga kwigalelo le-18V, elilungele unikezelo lwamandla lwangaphandle.

9. I-USB TYPE C debug port: UHLOBO C lunokudityaniswa kwaye lukhutshwe ngaphambili nangasemva.Ufakelo lwangaphambili lunxibelelana netshiphu yeWIFI ESP32-C ukucwangcisa itshiphu yeWIFI;ukufakela umva kunxibelelana ne-XR21V1410IL16 ukulungiselela i-T5L.UHLOBO C luxhasa umbane we-5V.

10. Unxibelelwano lwe-port parallel: I-T5L OS engundoqo inamachweba amaninzi e-IO yamahhala, kunye ne-16bit parallel unxibelelwano lwe-port lungenziwa.Idityaniswe ne-ST ARM FMC ehambelanayo ye-port protocol, ixhasa ukufunda nokubhala okuhambelanayo.

11. I-LCM RGB idizayini ye-interface ye-speed-speed interface: I-T5L RGB imveliso iqhagamshelwe ngokuthe ngqo kwi-LCM RGB, kwaye ukuxhathisa i-buffer yongezwa phakathi ukunciphisa ukuphazamiseka kwamanzi e-LCM.Xa i-wiring, nciphisa ubude be-interface ye-RGB yoxhumo, ngokukodwa i-PCLK uphawu, kwaye ukwandise i-PCLK ye-RGB interface, i-HS, i-VS, i-DE amanqaku okuvavanya;i-SPI port yesikrini ixhunyiwe kwi-P2.4 ~ P2.7 izibuko ze-T5L, ezilungele ukuyila umqhubi wesikrini.Ukukhokela ngaphandle kwe-RST, i-nCS, i-SDA, i-SCI amanqaku okuvavanya ukuququzelela ukuphuhliswa kwesoftware ephantsi.

(2) I-interface ye-DGUS

1.6 Ulawulo lokubonisa oluguquguqukayo lwedatha

(3) OS
//——————————— DGUS ukufunda nokubhala ifomathi
uhlobo lwe-typedef
{
u16 ukongeza;//UI 16bit idilesi eguquguqukayo
u8 DatLen;//8bitdata ubude
u8 *pBuf;//8bit isalathisi sedatha
} UI_packTypeDef;//DGUS funda kwaye ubhale iipakethi

//——————————-ulawulo oluguquguqukayo lwedatha
uhlobo lwe-typedef
{
u16 VP;
u16 X;
u16 Y;
U16 Umbala;
u8 Lib_ID;
u8 Ubungakanani befonti;
u8 Ulungelelwaniso;
u8 IntNum;
u8 Disemba;
u8 Uhlobo;
u8 LenUint;
u8 StringUinit[11];
} Inani_spTypeDef;//ulwakhiwo lwenkcazo eguquguqukayo yedatha

uhlobo lwe-typedef
{
Inani_spTypeDef sp;//chaza isalathi senkcazo ye-SP
UI_packTypeDef spPack;//chaza SP variable DGUS funda kwaye ubhale ipakethe
UI_packTypeDef vpPack;//chaza i-vp eguquguqukayo ye-DGUS yokufunda nokubhala ipakethe
} Number_HandleTypeDef;//ulwakhiwo oluguquguqukayo lwedatha

Ngenkcazelo yangaphambili yokutshintsha komqheba wedatha.Okulandelayo, chaza ukuguquguquka kwesiboniso sesampulu sombane:
Inombolo_HandleTypeDef Hsample;
U16 isampuli yombane;

Okokuqala, yenza umsebenzi wokuqalisa
NumberSP_Init(&Hsample,voltage_sample,0×8000);//0×8000 nantsi isalathisi senkcazo
//——Utshintsho lwedatha olubonisa ukuqaliswa kwesakhiwo sesalathisi se-SP——
iVoid NumberSP_Init(Number_HandleTypeDef *inombolo,u8 *ixabiso, u16 numberAddr)
{
inombolo->spPack.addr = numberAddr;
inani->spPack.datLen = sizeof(inombolo->sp);
inani->spPack.pBuf = (u8 *)&number->sp;
        
Funda_Dgus(&inombolo->spPack);
inombolo-> vpPack.addr = inombolo-> sp.VP;
tshintsha (inombolo-> sp.Type) // Ubude bedatha ye-vp eguquguqukayo ikhethwa ngokuzenzekelayo ngokohlobo lwedatha oluyilwe kwi-interface ye-DGUS.

{
imeko 0:
imeko 5:
inombolo->vpPack.datLen = 2;
ikhefu;
imeko 1:
ityala 2:
ityala 3:
imeko 6:
inombolo->vpPack.datLen = 4;
imeko 4:
inombolo->vpPack.datLen = 8;
ikhefu;
}
inombolo->vpPack.pBuf = ixabiso;
}

Emva kokuqaliswa, i-Hsample.sp isalathiso senkcazo yedatha yesampulu yombane;I-Hsample.spPack sisalathisi sonxibelelwano phakathi kwe-OS engundoqo kunye ne-UI yombane wesampulu yedatha eguquguqukayo ngokusebenzisa umsebenzi wojongano lwe-DGUS;I-Hsample.vpPack luphawu lokutshintsha i-voltage yesampuli yedatha eguquguqukayo, njengeMibala yefonti, njl njl.I-Hsample.vpPack.addr yidilesi yedatha yesampulu yombane, efunyenwe ngokuzenzekelayo kumsebenzi wokuqalisa.Xa utshintsha idilesi eguquguqukayo okanye uhlobo lwedatha eguquguqukayo kwi-interface ye-DGUS, akukho mfuneko yokuhlaziya idilesi eguquguqukayo kwi-OS core synchronously.Emva kokuba i-OS core ibala i-voltage_sample variable, idinga kuphela ukwenza umsebenzi we-Writ_Dgus (&Hsample.vpPack) ukuyihlaziya.Akukho mfuneko yokupakisha i-voltage_sample yokuhanjiswa kwe-DGUS.